From 3eaf2dff37e247022ec84f876bfc47d686fcae09 Mon Sep 17 00:00:00 2001 From: "kaf24@firebug.cl.cam.ac.uk" Date: Thu, 23 Feb 2006 18:30:43 +0100 Subject: [PATCH] Remove TBF_SLOW_IRET hack from x86/64 Xen return-to-guest path. Guest should set up flags for itself in its own NMI handler. Signed-off-by: Keir Fraser --- xen/arch/x86/x86_64/entry.S | 5 +---- xen/include/asm-x86/processor.h | 1 - 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 30cc19cc4d..984d9d82a5 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -206,7 +206,7 @@ process_nmi: sti leaq VCPU_trap_bounce(%rbx),%rdx movq %rax,TRAPBOUNCE_eip(%rdx) - movw $(TBF_INTERRUPT|TBF_SLOW_IRET),TRAPBOUNCE_flags(%rdx) + movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx) call create_bounce_frame jmp test_all_events 1: bts $_VCPUF_nmi_pending,VCPU_flags(%rbx) @@ -229,9 +229,6 @@ create_bounce_frame: 1: /* In kernel context already: push new frame at existing %rsp. */ movq UREGS_rsp+8(%rsp),%rsi andb $0xfc,UREGS_cs+8(%rsp) # Indicate kernel context to guest. - testw $(TBF_SLOW_IRET),TRAPBOUNCE_flags(%rdx) - jz 2f - orb $0x01,UREGS_cs+8(%rsp) 2: andq $~0xf,%rsi # Stack frames are 16-byte aligned. movq $HYPERVISOR_VIRT_START,%rax cmpq %rax,%rsi diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index 585f4bed26..8545c16c54 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -124,7 +124,6 @@ #define TBF_EXCEPTION_ERRCODE 2 #define TBF_INTERRUPT 8 #define TBF_FAILSAFE 16 -#define TBF_SLOW_IRET 32 /* 'arch_vcpu' flags values */ #define _TF_kernel_mode 0 -- 2.30.2